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High-Level Synthesis

Papers

Showing 7180 of 96 papers

TitleStatusHype
Subgraph Extraction-based Feedback-guided Iterative Scheduling for HLS0
High-level synthesis design of scalable ultrafast ultrasound beamformer with single FPGA0
Towards Enabling Dynamic Convolution Neural Network Inference for Edge Intelligence0
VAQF: Fully Automatic Software-Hardware Co-Design Framework for Low-Bit Vision Transformer0
iDSE: Navigating Design Space Exploration in High-Level Synthesis Using LLMs0
Implementation of hyperspectral inversion algorithms on FPGA: Hardware comparison using High Level Synthesis0
Intelligent4DSE: Optimizing High-Level Synthesis Design Space Exploration with Graph Neural Networks and Large Language Models0
Intelligent experiments through real-time AI: Fast Data Processing and Autonomous Detector Control for sPHENIX and future EIC detectors0
HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level SynthesisCode0
Hierarchical Mixture of Experts: Generalizable Learning for High-Level SynthesisCode0
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