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High-Level Synthesis

Papers

Showing 6170 of 96 papers

TitleStatusHype
A Compilation Flow for the Generation of CNN Inference Accelerators on FPGAs0
Towards Enabling Dynamic Convolution Neural Network Inference for Edge Intelligence0
PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNsCode1
GenGNN: A Generic FPGA Framework for Graph Neural Network AccelerationCode1
High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing0
Hardware-Efficient Deconvolution-Based GAN for Edge ComputingCode0
VAQF: Fully Automatic Software-Hardware Co-Design Framework for Low-Bit Vision Transformer0
A Graph Deep Learning Framework for High-Level Synthesis Design Space Exploration0
Enabling Automated FPGA Accelerator Optimization Using Graph Neural Networks0
A system on chip for melanoma detection using FPGA-based SVM classifier0
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