| SqueezeJet: High-level Synthesis Accelerator Design for Deep Convolutional Neural Networks | May 6, 2018 | High-Level Synthesisobject-detection | —Unverified | 0 | 0 |
| Subgraph Extraction-based Feedback-guided Iterative Scheduling for HLS | Jan 22, 2024 | High-Level SynthesisScheduling | —Unverified | 0 | 0 |
| High-level synthesis design of scalable ultrafast ultrasound beamformer with single FPGA | Aug 6, 2022 | High-Level Synthesis | —Unverified | 0 | 0 |
| Towards Enabling Dynamic Convolution Neural Network Inference for Edge Intelligence | Feb 18, 2022 | High-Level Synthesis | —Unverified | 0 | 0 |
| VAQF: Fully Automatic Software-Hardware Co-Design Framework for Low-Bit Vision Transformer | Jan 17, 2022 | High-Level SynthesisQuantization | —Unverified | 0 | 0 |
| iDSE: Navigating Design Space Exploration in High-Level Synthesis Using LLMs | May 28, 2025 | High-Level SynthesisMultiobjective Optimization | —Unverified | 0 | 0 |
| Accelerating Markov Random Field Inference with Uncertainty Quantification | Aug 2, 2021 | GPUHigh-Level Synthesis | —Unverified | 0 | 0 |
| A Compilation Flow for the Generation of CNN Inference Accelerators on FPGAs | Mar 8, 2022 | CPUHigh-Level Synthesis | —Unverified | 0 | 0 |
| A Graph Deep Learning Framework for High-Level Synthesis Design Space Exploration | Nov 29, 2021 | Graph Neural NetworkHigh-Level Synthesis | —Unverified | 0 | 0 |
| A reconfigurable neural network ASIC for detector front-end data compression at the HL-LHC | May 4, 2021 | Data CompressionHigh-Level Synthesis | —Unverified | 0 | 0 |
