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High-Level Synthesis

Papers

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Showing 26–50 of 96 papers

TitleStatusHype
iDSE: Navigating Design Space Exploration in High-Level Synthesis Using LLMs—0
Intelligent4DSE: Optimizing High-Level Synthesis Design Space Exploration with Graph Neural Networks and Large Language Models—0
Enhancing CuFP Library with Self-Alignment TechniqueCode0
Can Reasoning Models Reason about Hardware? An Agentic HLS Perspective—0
A Reconfigurable Stream-Based FPGA Accelerator for Bayesian Confidence Propagation Neural Networks—0
Exploring Code Language Models for Automated HLS-based Hardware Generation: Benchmark, Infrastructure and Analysis—0
MetaML-Pro: Cross-Stage Design Flow Automation for Efficient Deep Learning Acceleration—0
Neural Architecture Codesign for Fast Physics ApplicationsCode0
Intelligent experiments through real-time AI: Fast Data Processing and Autonomous Detector Control for sPHENIX and future EIC detectors—0
Agentic-HLS: An agentic reasoning based high-level synthesis system using large language models (AI for EDA workshop 2024)Code0
KALAM: toolKit for Automating high-Level synthesis of Analog computing systeMs—0
Hierarchical Mixture of Experts: Generalizable Learning for High-Level SynthesisCode0
Learning to Compare Hardware Designs for High-Level SynthesisCode0
Are LLMs Any Good for High-Level Synthesis?—0
Efficient Task Transfer for HLS DSE—0
HENNC: Hardware Engine for Artificial Neural Network-based Chaotic Oscillators—0
Exploring the Limitations of Kolmogorov-Arnold Networks in Classification: Insights to Software Training and Hardware ImplementationCode0
CuFP: An HLS Library for Customized Floating-Point OperatorsCode0
Deep Inverse Design for High-Level SynthesisCode0
Automated C/C++ Program Repair for High-Level Synthesis via Large Language Models—0
New Solutions on LLM Acceleration, Optimization, and Application—0
Cross-Modality Program Representation Learning for Electronic Design Automation with High-Level Synthesis—0
fSEAD: a Composable FPGA-based Streaming Ensemble Anomaly Detection LibraryCode0
Fast Algorithms for Spiking Neural Network Simulation with FPGAsCode0
Skip the Benchmark: Generating System-Level High-Level Synthesis Data using Generative Machine LearningCode0
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