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High-Level Synthesis

Papers

Showing 125 of 96 papers

TitleStatusHype
Iceberg: Enhancing HLS Modeling with Synthetic DataCode0
Embedded FPGA Acceleration of Brain-Like Neural Networks: Online Learning to Scalable Inference0
iDSE: Navigating Design Space Exploration in High-Level Synthesis Using LLMs0
LLM-DSE: Searching Accelerator Parameters with LLM AgentsCode1
Intelligent4DSE: Optimizing High-Level Synthesis Design Space Exploration with Graph Neural Networks and Large Language Models0
HLS-Eval: A Benchmark and Framework for Evaluating LLMs on High-Level Synthesis Design TasksCode1
Enhancing CuFP Library with Self-Alignment TechniqueCode0
Design and Implementation of an FPGA-Based Hardware Accelerator for TransformerCode1
Can Reasoning Models Reason about Hardware? An Agentic HLS Perspective0
A Reconfigurable Stream-Based FPGA Accelerator for Bayesian Confidence Propagation Neural Networks0
Exploring Code Language Models for Automated HLS-based Hardware Generation: Benchmark, Infrastructure and Analysis0
MetaML-Pro: Cross-Stage Design Flow Automation for Efficient Deep Learning Acceleration0
Neural Architecture Codesign for Fast Physics ApplicationsCode0
Intelligent experiments through real-time AI: Fast Data Processing and Autonomous Detector Control for sPHENIX and future EIC detectors0
Agentic-HLS: An agentic reasoning based high-level synthesis system using large language models (AI for EDA workshop 2024)Code0
KALAM: toolKit for Automating high-Level synthesis of Analog computing systeMs0
Hierarchical Mixture of Experts: Generalizable Learning for High-Level SynthesisCode0
Learning to Compare Hardware Designs for High-Level SynthesisCode0
Are LLMs Any Good for High-Level Synthesis?0
Efficient Task Transfer for HLS DSE0
rule4ml: An Open-Source Tool for Resource Utilization and Latency Estimation for ML Models on FPGACode1
HENNC: Hardware Engine for Artificial Neural Network-based Chaotic Oscillators0
Exploring the Limitations of Kolmogorov-Arnold Networks in Classification: Insights to Software Training and Hardware ImplementationCode0
CuFP: An HLS Library for Customized Floating-Point OperatorsCode0
Deep Inverse Design for High-Level SynthesisCode0
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